Is the main advantage of RISC-V’s that it is a free and open standard, or does it have other inherent advantages over other RISC architectures as well?
It’s predominantly the first one. They have made a few unique design decisions, but is a fairly conservative “boring” RISC design. The only thing remarkable I can think of of the core ISA is the fact that they have no conditional status registers (no NZVC bits), so you have to kind of combine conditions and branches together, but that’s not exactly unprecedented (MIPS did something similar).
In the ISA extensions, there is still some instability and disagreement about the best ISA design for some parts. Just the fact that RISC-V is going to have both SIMD and Vector instructions is a bit unique, but probably won’t make a huge difference.
But it’s a fairly boring RISC design which is free and open and without any licensing hoops to jump through, which is the most interesting bit.
The advantages that we’ll see come from the implementation more than the spec, but having an open standard for the ISA allows more companies to make implementations and to innovate.
The true benefits will be ~10 years in, when RISCV chip designers are more experienced and have had time to innovate and build good IP blocks.
E.g. companies that make ARM SoCs are pick’n mix’ing IP from ARM, and adding their own special sauce on top. The future in RISCV comes from having many companies that compete to make intercompatible IP, which hardware vendors like Qualcomm and Rockchip can then licence to make SoCs out of.
There is benefit to RISCV, over ARM but mostly that comes down to:
- not having legacy compatibility to maintain.
- having a frozen spec that is less likely to slowly get feature creep like x86 & ARM.
- having hindsight for things like vector extension implementations & macro-op fusion.
I purchased a LicheePi 4A from Sipeed and it’s really a good news for me.
Cool, I really want something like RPi, but with SATA on RISC-V. Maybe somebody will make “laptop” cases with normal deep travel keyboards for these too. It’s a possibility, at least.
Anyone know what kind of board used by Debian maintainers for testing Debian on RISC-V?
The porterbox is a HiFie Unmatched.
This one? https://www.sifive.com/boards/hifive-unmatched
Very interesting, looks like you can buy it for $700 on AliExpress. I wonder if there are other debian compatible RISC -V boards with cheaper prices. $700 is not exactly hobbyist friendly.
This is certainly positive news. We need more competition in the processor field. Having essentially a choice between Intel and AMD got us malware like the Intel Management Engine and its AMD equivalent. With a monopoly comes enshitification.
There’s ARM, with Snapdragon, Mediathek, Broadcom, Nvidia, Apple and Ampere. Contrary to RISC-V it’s already used in many computers.
Sure, but they’re all using ARM IP; RISCV isn’t just one entrant into the processor IP market like ARM is, it allows any company to become an entrant with its own IP.
Sure it’s not currently the ISA for man main processors, but it is already used by companies like NVIDIA and WD in their products.
Not that I disagree with you but what’s stopping any ARM or RISC-V CPU manufacturer from putting their own version of IME in their chips?
