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12 points
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People overblow the importance of ISA.

Honestly a lot of the differences are business decisions. There is a balance between price, raw performance and power efficiency. Apple tend to focus exclusively on the latter two at the expense of price, while Intel (and AMD) have a bad habit of chasing cheap raw performance.

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3 points

Decode overhead is fairly fixed, and proportionately has become tiny over the decades. Most larger instructions dispatch to microcode, and compilers know better than to use them much.

There’s a price to x86, but for larger cores it’s pretty small, we’ve learned to work around it.

Apple bothered to do the things Intel was too lazy to do for so long, particularly improve the ooo and other resources to where Intel didn’t want to spend the silicon. Intel has always been cheap, nickel and diming their way out of performance, this is the cost.

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2 points

Apple does two things that are very expensive:

  1. They use a huge physical area of silicon for their high performance chips. The “Pro” line of M chips have a die size of around 280 square mm, the “Max” line is about 500 square mm, and the “Ultra” line is possibly more than 1000 square mm. This is incredibly expensive to manufacture and package.
  2. They pay top dollar to get the exclusive rights to TSMC’s new nodes. They lock up the first year or so of TSMC’s manufacturing capacity at any given node, at which point there is enough capacity to accommodate other designs from other TSMC clients (AMD, NVIDIA, Qualcomm, etc.). That means you can just go out and buy an Apple device made from TSMC’s latest node before AMD or Qualcomm have even announced the lines that will be using those nodes.

Those are business decisions that others simply can’t afford to follow.

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1 point

800 is reticle, they’re not past that, it doesn’t make sense.

They chiplet past 500, the economics break down otherwise.

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1 point

They chiplet past 500

I don’t know if I’m using the right vocabulary, maybe “die size” is the wrong way to describe it. But the Ultra line packages two Max SoCs with a high performance interconnect, so that the whole package does use about 1000 mm^2 of silicon.

My broader point is that much of Apple’s performance comes from their willingness to actually use a lot of silicon area to achieve that performance, and it’s very expensive to do so.

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